I. Field
The present disclosure relates generally to electronics circuits, and more specifically to a loop filter suitable for use in a phase-locked loop.
II. Background
Phase-locked loops (PLLs) are commonly used in many electronics circuits and are particularly important in communication circuits. For example, digital systems use clock signals to trigger synchronous circuits, e.g., flip-flops. Transmitter and receiver systems use local oscillator (LO) signals for frequency upconversion and downconversion, respectively. Wireless devices (e.g., cellular phones) in wireless communication systems typically use clock signals for digital circuitry and LO signals for transmitter and receiver circuitry. Clock and LO signals are often generated with voltage-controlled oscillators (VCOs) operating within PLLs.
A PLL typically includes a VCO, a loop filter, and other circuit blocks. The loop filter receives and filters a phase error signal and generates a control signal for the VCO. The loop filter may be implemented with discrete circuit components that are external to an integrated circuit (IC). To reduce cost and possibly improve reliability, it is desirable to implement the loop filter on the IC. However, the loop filter typically has a large capacitor that would occupy a large area of the IC. Various schemes may be used to reduce the size of the capacitor. Unfortunately, many of these schemes introduce significant amount of noise to the PLL. The noise may degrade performance and may even cause the VCO/PLL to fail specifications.
There is therefore a need in the art for a loop filter suitable for integration on an IC and having good performance.